In integrated analog circuits in NMOS technology (n-channel MOS) with a single voltage supply having not high level (e.g. 5 V), some circuit parts have limited output voltage swing and require a differential reference voltage, i.e. two reference voltages for minimum and maximum signal levels, since minimum signal level is different from ground; besides the difference between the two reference voltages is to remain stable.
Examples of such circuit parts are analog-to-digital or digital-to-analog converters where the weighting network output is decoupled by a voltage follower amplifier whose output voltage swing is limited and requires a voltage reference different from ground for minimum signal level.
NMOS single-supply circuits for generating single reference voltages are already known in the art, as that described in the paper "A new NMOS Temperature-Stable Voltage Reference" by R. A. Blauschild et al., IEEE Journal of Solid-State Circuits, vol. SC-13, pp. 767-774, December 1978.
In said circuit the reference voltage is derived from the difference between gate-source threshold voltages of an enhancement and a depletion MOS transistors both implemented with the same technology. Reference voltage is kept stable by a feedback obtained with a high-gain differential amplifies; that gives rise to serious stability problems, making it necessary to insert a compensating network, for the feedback loop, taking up a large silicon area. Moreover, reference voltage has a fixed and not-programmable value.